DIGITAAL ONTWERP : HDL-SYNTHESE I
 
Lectured in 3rd year Bachelor in Industrial Sciences in Electronics-ICT
Theory [A] 24.0
Exercises [B] 12.0
Training and projects [C] 0.0
Studytime [D] 85
Studypoints [E] 3
Level in-depth
Language of instruction Dutch
Lecturer Nog niet bepaald
Reference IBIWEL03A00009
 
Key words
VHDL, Digital design

Objectives
The global goal is to acquire practical knowledge of VHDL with an emphasis on synthesis and simulation. Specific attention is given to
  • the difference between hardware and software implementations;
  • the difference between a model appropriate for simulation and a model suited for synthesis;
  • inference of efficient hardware.


Topics
Theory
  1. Introduction to digital design
  2. Basics of simulation and synthesis
  3. Basics of VHDL: entity and architecture
  4. More abstract concepts, processes
  5. Structural descriptions
Laboratory
  • How to work with a toolchain
  • VHDL-descriptions using ASM-charts
  • Exercises that focus on the distinction between models used for simulation and models used for synthesis
  • Programming on a CPLD or FPGA , testing and debugging
  • How to make structural descriptions


Prerequisites
Digitale elektronica II. Knowledge of a procedural programming language such as C, C++ or Java.

Final Objectives
A first objective is to be able to simulate, design and test complex digital circuits in an HDL. A second objective is more abstract. The student should be able to express the solution of a problem in terms of an algorithm and to implement that algorithm either in software, or in hardware, or a mixture of both software and hardware.

Materials used
Introductory VHDL From Simulation to Synthesis (Sudhakar Yalamanchili)

Study costs
50 euro

Study guidance
During certain hours the students can ask for more explanation or clarification.

Teaching Methods
Oral lectures and lab sessions.

Assessment
Theory: oral exam
Lab sessions: permanent evaluation

A weighted average is used to compute the final score for a training item. However, if a student gains a score of 7 or less on 20 on one of the different courses (parts of training items) , he proves that his skill for certain subcompetencies is insufficient. Consequently, one can turn from the arithmetical calculation of the final assignment of quotas of a training item and the new marks can be awarded on consensus. Of course, the examiners can judge that the arithmetic regulations mentioned in the study index card can also be used for 7 or less. For each deviation a detailed motivation ought to be drawn up. In that case one should point out that the skill for this subcompetency is proven to be insufficient, if the student didn’t pass the partim that is considered to be important for certain subcompetencies.

Lecturer(s)